Edge termination areas of semiconductor devices, e.g. power semiconductor devices having blocking voltage capabilities of several hundreds or thousands of volts, are sensitive to charges accumulated in dielectrics covering surfaces. Both positive and negative charges may affect the blocking voltage capabilities of semiconductor devices, e.g. Insulated Gate Bipolar Transistors (IGBTs), FETs (Field Effect Transistors) or diodes, adversely. Since charges accumulated in dielectrics may be displaced by electrical fields, this may lead to instabilities during operation of the semiconductor devices. Any kind of junction terminations, e.g. field rind structures, Variation of Lateral Doping (VLD) edge termination structures or Junction Termination Extension (JTE) edge termination structures may be affected adversely and deteriorate a reliability of the semiconductor device. In the edge termination area a considerable amount of undesired charges may accumulate since the edge termination area may contribute to a substantial part an overall chip area. As an example, positive charges in oxides may be due to presence of alkaline metals, e.g. sodium (Na) and/or potassium (K), and negative charges may due to presence of impurities, e.g. OH−.
It is desirable to improve the reliability of semiconductor devices and to provide a method of manufacturing a semiconductor device.